1. Field of the Invention
The present invention generally relates to an etching method and especially to an etching method of etching the upper surface of a silicon wafer or the like using an etching solution.
2. Description of the Related Art
A semiconductor apparatus using an SOI (Silicon on Insulator) substrate is generally advantageous in energy-saving and operation speed, as compared with a semiconductor apparatus using an Si substrate such as a silicon (Si) wafer. For example, in the area of a photoelectric conversion apparatus such as an image sensor, it has been proposed to use an SOI substrate.
On the other hand, along with an increase in number of opportunities to capture an image or observe an object at a high definition and high resolution, high-density image sensors are increasingly proposed/developed year by year. In a high-density image sensor, photoelectric conversion elements such as photodiodes are arrayed at high density to form a photoelectric conversion unit. As the density is higher, the area of the light-receiving surface (pixel) of the photoelectric conversion element has to become smaller. As the area of the light-receiving surface becomes smaller, an amount of light entering the photoelectric conversion element per unit time also becomes smaller and thus it is necessary to improve the light sensitivity of the photoelectric conversion element. However, improvement of the light sensitivity has limitations.
Furthermore, one of large factors which decrease the area of the light-receiving surface more than necessary along with an increase in density is an area occupied by wiring for transmitting a signal to each photoelectric conversion element or driving element, and applying a predetermined voltage to a predetermined position of the image sensor. In general, wiring is designed to have a wide width as much as possible to keep its resistance low for the convenience of manufacturing. For this reason, the ratio of an area occupied by wiring of a light-receiving unit including a plurality of two-dimensionally arrayed light-receiving surfaces increases as the density of the arrayed light-receiving surfaces is higher. To avoid this situation, it has been proposed and put into practical use to decrease the resistance by increasing the thickness of the wiring instead of its width. However, it causes an increase in number of manufacturing processes, resulting in an increase in cost.
In recent years, as a method of increasing the density and improving the light sensitivity, a number of so-called back-side illumination image sensors which cause light to enter in a direction (from the lower surface of an Si substrate) opposite to the incident direction to the photoelectric conversion unit of a general image sensor have been proposed since it is possible to reduce the influence of the wiring area, and some of the image sensors have been put into practical use. In this type of image sensors, a first substrate in which a photoelectric conversion unit is provided and a second substrate in which a driving circuit is provided on an SOI substrate are bonded so that a surface of the first substrate opposite to that on which the photoelectric conversion unit is provided faces a surface of the second substrate on which the driving circuit is provided.
Since, however, light enters the photoelectric conversion elements through the Si substrate, it is required to provide a measure for allowing light beams of respective colors (wavelengths) to efficiently enter the light-receiving surfaces of corresponding photoelectric conversion elements, respectively.
There is proposed one method of removing the lower surface of the Si substrate by CMP (Chemical Mechanical Polishing) or wet etching, so that the Si substrate becomes as thin as possible. However, since the Si substrate is relatively thick, it is conventionally ground by CMP to a predetermined thickness, and then undergoes wet etching to remove a so-called damage layer due to CMP. This requires a long time, and rate-determines the production efficiency, resulting in an increase in cost.
Meanwhile, fluonitric acid is well known as an etching solution for wet etching of an Si substrate. Since fluonitric acid is a strong acid, there are constraints on containers for transportation and storage, and the materials of a container and pipe in use, and thus the use of fluonitric acid is often limited. Therefore, fluonitric acid is actually used at a low acid concentration at a production site, which is a hindrance to shortening of an etching time to improve the productivity.
On the other hand, Yoshikawa et al. “Silicon Wafer Thinning Technology for Three-Dimensional Integrated Circuit by Wet Etching”, IEICE Technical Report 2009 (NPL 1) describes high-concentration fluonitric acid. The fluonitric acid described in NPL 1 has a performance of a high etching rate of 800 μm/min for an Si wafer (FIG. 19). The use of such fluonitric acid is expected to significantly improve the production efficiency of, for example, a back-side illumination image sensor.